Simulation of Digital Matching Schemes

ECEn 361 Lab #4a&b (two weeks)

Overview

In this laboratory assignment you will use simulation tools as well as an experimental setup similar to the TDR to investigate the effects of mismatch at the driver and the load on digital pulses.

Experimental Arrangement

The experimental setup uses a BNC T-connector on Channel 1 of the oscilloscope. A short length of coax should be connected between one end of the T and the high-frequency function generator. A long piece of coax should be connected to the other port on the T. The other end of this long coax should be connected to Channel 2 of the oscilloscope. Sketch a T-Line schematic of your arrangement and show it to the lab instructor. Notice that the impedance of both channels on the oscilloscope can be changed from 50 ohm to 1 MOhm (essentially an open circuit).

Thinking

Consider how the oscilloscope traces on each channel will appear as you vary impedance values between the 1 MOhm and 50 Ohm settings. In particular, analyze what the difference is between launching a series of rectangular pulses at 1 MHz relative to a series of pulses at 30 MHz for different driver and load impedances. Report your preditions in your lab writeup. Do this before performing any simulations or taking any measurements. Note that the 15 pF capacitance on the channel imputs will have relatively little effect at the 1-50 MHz excitations to be used in this laboratory demonstration. For higher frequency excitation, however, this capacitance would have to be taken into account.

Simulations

1. In an ADS schematic, create the following circuit.

You will need the following palettes:
 
Lumped-Components Resistors and Capacitor
Sources-Time Domain BitSeq Source
TLines-Ideal Transmission Line Element
Simulation-Transient Transient Simulation Element

To name the nodes 'Vin' and 'Vout', press the  button on the toolbar, type in 'Vin' or 'Vout', and click on the appropriate wire.

2. Electrically Short Line: Set E = 10 for the TLIN element (E is the electrical length in degrees - a value of 10 is electrically short) and perform a simulation ( button on toolbar). On a display window create two plots -- one for Vin and one for Vout as a function of time. Comment on the results. In specific, what do these results indicate about the necessity of performing matching for electrically short lines.

3. Matched Load: Set R3 = 50 Ohm and E = 135. Perform simulations with R2 = 1 MOhm and R2 = 50 Ohm. Also try changing the electrical length. Does the electrical length matter in this case? Why or why not?

4. Mismatched Load: Now set R3 = 1 MOhm and R2 = 1 MOhm. Perform simulations for E = 90, 135, 180, and 360. Comment on your observations. Pick out a particularly peculiar case and explain what is happening.

5. Mismatched Driver: Set R2 = 50 Ohm and perform and repeat Step 4.

6. Diode Termination: Augment your circuit to look like the following. You can get the DC voltage source from the 'Sources-Time Domain' palette and the Diode and Model from the 'Devices-Diode' palette. You should not need to set any parameters on the diode or the model.

Perform simulations using the values for E specified in Step 4 and for R2 = 1 MOhm and 50 Ohm. Comment on the behavior of this circuit.

Measurements

1. Switch the terminal impedances of both channels to 1 Megaohm. Set the generator to produce rectangular pulses with an amplitude of about 200 mV. Observe the amplitude of the O-scope signals as you vary the frequency. Sketch a circuit equivalent and explain your results in the context of matching in digital systems.

2. Repeat this same procedure including observations and sketches for all possible combinations of channel impedances.

Explanations
Write a summary of what you learned about impedance matching in digital circuits from the previous laboratory exercises and simulations.